FUJITSU F2MCTM-16LX - Manual (Page 392)

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CHAPTER 19 LOW VOLTAGE DETECTION/CPU OPERATING DETECTION RESET
19.3 Low Voltage/CPU Operating Detection Reset Circuit
Register
This register clears the low voltage/CPU operating detection reset flag and the counter
of CPU operating detection circuit.
■ Low Voltage/CPU Operating Detection Reset Control Register (LVRC)
Figure 19.3-1 Low Voltage/CPU operating Detection Reset Control Register (LVRC)
CPU operatign detection flag bit
CPUF
Read Write
0 No overflow Clear CPUF bit
1 Overflow No change, No other effect
Low voltage detection flag bit
LVRF
Read Write
0 No detect voltage falling Clear LVRF bit
1 Detect voltage falling No change, No other effect
CL CPU operating detection circuit clear bit
0 Counter clear
1 No change, No other effect
Reserved Reserved bit
This bit should write "1".
Reserved Reserved bit
This bit should write "0".
Reserved Reserved Reserved CL LVRF Reserved CPUF Reserved
W R/W
bit7 bit6 bi t5 bit3 bit2 bit1 bit0 bit4
00111000 b
Initial value
R/W R/W R/W R/W R/W
Address
R/W:Read Write
:Initial value
006E H