FUJITSU F2MCTM-16LX - Manual (Page 497)

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21.4.23 Message Buffers
There are 16 message buffers. Message buffer x (x = 0 to 15) consists of an ID register
(IDRx), DLC register (DLCRx), and data register (DTRx).
■ Message Buffers
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Register Configuration
• ID register x (x = 0 to 15) (IDRx)
This register is a ID register of the message buffer. This register memorizes receipt code setting,
transmission message ID setting, and reception ID.
• DLC register x (x = 0 to 15) (DLCRx)
This register stores the DLC of the message buffer. This register sets the data length of the message when
a data frame and a remote frame are transmitted and the data length of the message when a data frame or
a remote frame is received.
• Data register x (x = 0 to 15) (DTRx)
This register is a data register of the message buffer. This register memorizes the setting or the reception
message data of the transmission message data.
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The message buffer (x) is used both for transmission and reception.
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The lower-numbered message buffers are assigned higher priority.
• At transmission, when a request for transmission is made to more than 1 message buffer, transmission is
performed, starting with the lowest-numbered message buffer (See "21.5 Transmission of CAN
Controller").
• At reception, when the received message ID passes through the acceptance filter (mechanism for
comparing the acceptance-masked ID of received message and message buffer) of more than 1 message
buffer, the received message is stored in the lowest-numbered message buffer (See "21.6 Reception of
CAN Controller").