FUJITSU F2MCTM-16LX User Manual
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CHAPTER 21 CAN CONTROLLER
●
Message buffer that can be used as multi level message buffer
When the same receipt filter is set in 1 or more message buffers, the message buffer can be used as a multi
level message buffer.
As a result, the reserve to the reception time is given. (See "21.10 Procedure for Reception by Message
Notes:
•
A write operation to message buffers and general-purpose RAM areas should be performed in words to
even addresses only. A write operation in bytes causes undefined data to be written to the upper byte at
writing to the lower byte. Writing to the upper byte is ignored.
•
When the BVALx bit of the message buffer valid register (BVALR) is 0 (Invalid), the message buffers
x (IDRx, DLCRx, and DTRx) can be used as general-purpose RAM.
During the receive/transmit operation of the CAN controller, the CAN Controller write/read to/from the
message buffers. If the CPU tries to write/read to/from the message buffers in this period, the CPU has
to wait a maximum time of 64 machine cycles.
This is also true for the general-purpose RAM (Address 007A00
H
to 007A1F
H
, 007C00
H
to 007C1F
H
,
007E00
H
to 007E1F
H
).