FUJITSU F2MCTM-16LX - Manual (Page 78)

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CHAPTER 3 INTERRUPTS
[bit 11, bit 3] ISE (extended intelligent I/O service enable bits)
The ISE bit is readable and writable. In response to an interrupt request, EI
2
OS is activated when '1' is
set in the ISE bit and an interrupt sequence is activated when '0' is set in the ISE bit. Upon completion
of EI
2
OS, the ISE bit is cleared to a zero. If the corresponding peripheral does not have the EI
2
OS
function, the ISE bit must be set to '0' on the software side.
Upon a reset, the ISE bit is initialized to '0'.
Table 3.3-1 Interrupt Level Setting Bits and Interrupt Levels
ILM2 ILM1 ILM0 Level
0 0 0 0 (strongest)
0 0 1 1
0 1 0 2
0 1 1 3
1 0 0 4
1 0 1 5
1 1 0 6 (weakest)
1 1 1 7 (no interrupt)