Mitac secret confidential document, 5 appendix 1: intel ich6-m gpio definitions (2) – MiTAC 8050QMA User Manual
Page 44
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50QMA
50QMA
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Pin name
Current Define
Power plane
GPIO28 X
I/O RESUME
GPIO29 PANEL_ID1
I
MAIN
GPIO30 PANEL_ID2
I
MAIN
GPIO31 PANEL_ID3
I
MAIN
GPIO32 PCLKRUN#
I/O
MAIN
GPIO33 MB_ID0
I/O
MAIN
GPIO34 MB_ID1
I/O
MAIN
GPIO40 MXM_DETECT#
I
MAIN
GPIO41 CRT_IN#
I
MAIN
GPIO48 X
O
MAIN
GPIO49 HPWRGD
OD
O
MAIN
1.5 Appendix 1: Intel ICH6-M GPIO Definitions (2)
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