NEC switch - Manual (Page 17)

User’s Manual U12978EJ3V0UD
17
LIST OF FIGURES (3/4)
Figure No. Title Page
8-31 Flow Chart of NRZI Encoder Operation ................................................................................................. 150
8-32 Timing of Bit Stuffing/Strip Controller Operation .................................................................................... 151
8-33 Flow Chart of Bit Stuffing Control Operation .......................................................................................... 152
8-34 Flow Chart of Bit Strip Control Operation ............................................................................................... 153
9-1 Block Diagram of Serial Interface 10...................................................................................................... 156
9-2 Format of Serial Operation Mode Register 10........................................................................................ 157
9-3 3-Wire Serial I/O Mode Timing ............................................................................................................... 161
10-1 Block Diagram of Regulator and USB Driver/Receiver .......................................................................... 162
11-1 Basic Configuration of Interrupt Function............................................................................................... 165
11-2 Format of Interrupt Request Flag Register............................................................................................. 167
11-3 Format of Interrupt Mask Flag Register.................................................................................................. 168
11-4 Format of External Interrupt Mode Register 0 ........................................................................................ 168
11-5 Configuration of Program Status Word .................................................................................................. 169
11-6 Format of Key Return Mode Register 00................................................................................................ 170
11-7 Block Diagram of Falling Edge Detector ................................................................................................ 170
11-8 Flowchart of Non-Maskable Interrupt Request Acknowledgment .......................................................... 172
11-9 Timing of Non-Maskable Interrupt Request Acknowledgment ............................................................... 172
11-10 Acknowledging Non-Maskable Interrupt Request .................................................................................. 172
11-11 Interrupt Acknowledgment Program Algorithm....................................................................................... 173
11-12 Timing of Interrupt Request Acknowledgment (Example of MOV A,r) ................................................... 174
11-13 Timing of Interrupt Request Acknowledgment
(When Interrupt Request Flag Is Generated at Last Clock of Instruction Execution)............................. 174
11-14 Example of Multiplexed Interrupt Servicing ............................................................................................ 176
12-1 Format of Oscillation Stabilization Time Select Register ....................................................................... 179
12-2 Releasing HALT Mode by Interrupt ........................................................................................................ 181
12-3 Releasing HALT Mode by RESET Input ................................................................................................ 182
12-4 Releasing STOP Mode by Interrupt ....................................................................................................... 184
12-5 Releasing STOP Mode by RESET Input................................................................................................ 185
13-1 Block Diagram of Reset Function........................................................................................................... 186
13-2 Reset Timing by RESET Input ............................................................................................................... 187
13-3 Reset Timing by Overflow in Watchdog Timer ....................................................................................... 187
13-4 Reset Timing by RESET Input in STOP Mode ....................................................................................... 187
14-1 Environment for Writing Program to Flash Memory ............................................................................... 191
14-2 Communication Mode Selection Format ................................................................................................ 192