NEC switch - Manual (Page 174)

CHAPTER 11 INTERRUPT FUNCTIONS
User’s Manual U12978EJ3V0UD
174
Figure 11-12. Timing of Interrupt Request Acknowledgment (Example of MOV A,r)
Clock
CPU MOV A,r
Saving PSW and PC,
and jump to interrupt
handling
Interrupt servicing program
Interrupt
8 clocks
When an interrupt request flag (xxIF) is generated before clock n (n = 4 to 10) of the instruction being executed
turns to n - 1, the interrupt is acknowledged after the instruction has been executed. Figure 11-12 shows an
example for 8-bit data transfer instruction MOV A,r. It takes 4 clocks for this instruction to be executed. So, when an
interrupt occurs within 3 clocks after the instruction execution started, the interrupt is acknowledged after MOV A,r
has been executed.
Figure 11-13. Timing of Interrupt Request Acknowledgment
(When Interrupt Request Flag Is Generated at Last Clock of Instruction Execution)
Clock
CPU NOP MOV A,r
Save PSW and PC, and
jump to interrupt servicing
Interrupt
servicing
program
Interrupt
8 clocks
When an interrupt request flag (xxIF) is generated at the last clock for instruction execution, after the next
instruction has been executed, the interrupt acknowledgment servicing starts.
Figure 11-13 shows an example when an interrupt request flag is generated at the second clock for NOP (2-clock
instruction). In this case, the interrupt is acknowledged after MOV A,r has been executed after the NOP instruction
execution.
Caution Interrupt requests are held pending during access to interrupt request flag registers 0, 1 (IF0,
IF1) or interrupt mask flag registers 0, 1 (MK0, MK1).