NEC switch - Manual (Page 78)

CHAPTER 5 CLOCK GENERATOR
User’s Manual U12978EJ3V0UD
78
5.6 Changing Setting of CPU Clock
5.6.1 Time required for switching CPU clock
The CPU clock can be selected by using bit 1 (PCC1) of the processor clock control register (PCC).
Actually, the specified clock is not selected immediately after the setting of PCC has been changed; the old clock
is used for the duration of several instructions after that (see Table 5-2).
Table 5-2. Maximum Time Required for Switching CPU Clock
Set Value Before Switching Set Value After Switching
PCC1 PCC1 PCC1
0 1
0 4 clocks
1 2 clocks
Remark Before switching, the minimum instruction execution time of the CPU clock is two clocks.
5.6.2 Switching CPU clock
The following figure illustrates how the CPU clock switches.
Figure 5-5. Switching of CPU Clock
V DD
RESET
CPU clock
Slow
operation Fastest operation
Wait (5.46 ms: at 6.0 MHz operation)
Internal reset operation
<1> The CPU is reset when the RESET pin is made low on power application. The effect of resetting is released
when the RESET pin is later made high, and the system clock starts oscillating. At this time, the time during
which oscillation stabilization (2 15 /f X ) is automatically secured.
After that, the CPU starts instruction execution at the slow speed of the system clock (1.33
µs: at 6.0 MHz
operation).
<2> After the time required for the V
DD
voltage to rise to the level at which the CPU can operate at the highest
speed has elapsed, the processor clock control register (PCC) is rewritten so that the highest speed
operation can be selected.