Chapter 3 cpu architecture, 1 memory space – NEC switch User Manual
Page 35
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User’s Manual U12978EJ3V0UD
35
CHAPTER 3 CPU ARCHITECTURE
3.1 Memory Space
The
µPD789800 Subseries can access 64 KB of memory space.
Figures 3-1 and 3-2 show the memory maps.
Figure 3-1. Memory Map (
µµµµPD789800)
Reserved
Internal ROM
8,192
× 8 bits
Internal high-speed RAM
256
× 8 bits
Special function register
256
× 8 bits
H
F
F
F
F
H
0
0
F
F
H
F
F
E
F
H
0
0
E
F
H
F
F
D
F
H
F
F
F
1
H
0
8
0
0
H
F
7
0
0
H
0
4
0
0
H
F
3
0
0
H
A
1
0
0
H
9
1
0
0
H
0
0
0
0
H
0
0
0
2
H
0
0
0
0
Data memory
space
Program memory
space
Program area
CALLT table area
Vector table area
Program area
H
F
F
F
1
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