Texas Instruments TMS320DM36X - Manual (Page 115)

www.ti.com Ethernet Media Access Controller (EMAC) Registers
5.35 MAC Source Address Low Bytes Register (MACSRCADDRLO)
The MAC source address low bytes register (MACSRCADDRLO) is shown in Figure 74 and described
in Table 72 .
Figure 74. MAC Source Address Low Bytes Register (MACSRCADDRLO)
31 16
Reserved
R-0
15 8 7 0
MACSRCADDR0 MACSRCADDR1
R/W-0 R/W-0
LEGEND: R = Read only; R/W = Read/Write; -n = value after reset
Table 72. MAC Source Address Low Bytes Register (MACSRCADDRLO) Field Descriptions
Bit Field Value Description
31-16 Reserved 0 Reserved
15-8 MACSRCADDR0 0-FFh MAC source address lower 8 bits (byte 0)
7-0 MACSRCADDR1 0-FFh MAC source address bits 15-8 (byte 1)
5.36 MAC Source Address High Bytes Register (MACSRCADDRHI)
The MAC source address high bytes register (MACSRCADDRHI) is shown in Figure 75 and described
in Table 73 .
Figure 75. MAC Source Address High Bytes Register (MACSRCADDRHI)
31 24 23 16
MACSRCADDR2 MACSRCADDR3
R/W-0 R/W-0
15 8 7 0
MACSRCADDR4 MACSRCADDR5
R/W-0 R/W-0
LEGEND: R = Read only; R/W = Read/Write; -n = value after reset
Table 73. MAC Source Address High Bytes Register (MACSRCADDRHI) Field Descriptions
Bit Field Value Description
31-24 MACSRCADDR2 0-FFh MAC source address bits 23-16 (byte 2)
23-16 MACSRCADDR3 0-FFh MAC source address bits 31-24 (byte 3)
15-8 MACSRCADDR4 0-FFh MAC source address bits 39-32 (byte 4)
7-0 MACSRCADDR5 0-FFh MAC source address bits 47-40 (byte 5)
115 SPRUFI5B – March 2009 – Revised December 2010 Ethernet Media Access Controller (EMAC)/Management Data Input/Output
(MDIO)
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