Texas Instruments TMS320DM36X - Manual (Page 30)

Arbiter and
bus switches
CPU
DMA Controllers
8K byte
descriptor
memory
Configuration
registers
Interrupt
control and
pacing logic
EMAC interrupts
MDIO interrupts
Configuration bus
Transmit and Receive
4 interrupts
to ARM
Architecture www.ti.com
2.7 EMAC Control Module
The basic functions of the EMAC control module ( Figure 8 ) are to interface the EMAC and MDIO modules
to the rest of the system, and to provide for a local memory space to hold EMAC packet buffer descriptors.
Local memory is used to help avoid contention to device memory spaces. Other functions include the bus
arbiter, and interrupt control and pacing logic control.
Figure 8. EMAC Control Module Block Diagram
2.7.1 Internal Memory
The EMAC control module includes 8K bytes of internal memory. The internal memory block is essential
for allowing the EMAC to operate more independently of the CPU. It also prevents memory underflow
conditions when the EMAC issues read or write requests to descriptor memory. (Memory accesses to
read or write the actual Ethernet packet data are protected by the EMAC's internal FIFOs).
A descriptor is a 16-byte memory structure that holds information about a single Ethernet packet buffer,
which may contain a full or partial Ethernet packet. Thus with the 8K memory block provided for descriptor
storage, the EMAC module can send and received up to a combined 512 packets before it needs to be
serviced by application or driver software.
2.7.2 Bus Arbiter
The EMAC control module bus arbiter operates transparently to the rest of the system. It is used:
•
To arbitrate between the CPU and EMAC buses for access to internal descriptor memory.
• To arbitrate between internal EMAC buses for access to system memory.
30 Ethernet Media Access Controller (EMAC)/Management Data Input/Output SPRUFI5B – March 2009 – Revised December 2010
(MDIO)
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