B&K Precision 4078 - Manual - Manual (Page 79)

that were enabled before the last power down.
Type: Expression
The expression data takes the form
(NRf|<event range>[{,NRf|<event range>}])
where NRf represents an error number. Entries are rounded to integer values.
An <event range> is defined as
NRf:NRf
The first number in a range MUST be less than the second.
Up to 6 ranges may be specified using one :ENABle command, representing the 6 ranges of errors/events. The
ranges are then separated from each other by Program Data Separators (comma). The entire expression must be
enclosed in parentheses(...).
Command Type: Setting or Query
Setting
Syntax:
:STATus:QUEue:ENABle<ws><expression>
Example: :STAT:QUE:ENAB (-440:-410,-258:-220,402,-110)
Query
Syntax:
:STATus:QUEue:ENABle?
Response: (NRf|<event range>[{,[NRf|event range>]})
4.13.5.4 Questionable Status
The Questionable status data structure is used to alert the user to instrument conditions that affect the signal quality.
Two types of conditions are defined in the AWG, and these are:
1) Frequency - Trigger rate conflict, and
2) Output overload condition.
Each condition is reported separately for each channel. Thus, a total of four conditions may be reported.
The data structure is comprised of five 16-Bit registers. Each bit represents a different status condition. In the AWG,
bits 9 and 11 are used as follows:
Bit 9: Frequency - trigger rate conflict.
Bit 11: Output overload.
The existence of these conditions is indicated in the CONDition register. Bit 3 of the status byte is used to indicate
the occurrence of a questionable status condition. The conditions cause this bit to be set depending on the values of
the other four registers.
The positive transition filter enables a bit in the event register to be set when a condition changes from false to true.
The negative transition register enables a bit in the event register to be set when a condition changes from true to
false. In order for the bit in the event register to be set, the corresponding bit in the transition register must be set.
Bit 3 in the status byte will be set if a bit in the event register is set while the corresponding bit in the enable register
is set.
4.13.5.4.1 Questionable Condition