IEI Integration WAFER-945GSE2 v1.03 - Manual (Page 27)

WAFER-945GSE2 User Manual
Page 10
Thermal management support via Intel® Thermal Monitor 1 and Intel®
Thermal Monitor 2
FSB Lane Reversal for flexible routing
Supports C0/C1(e)/C2(e)/C4(e)
L2 Dynamic Cache Sizing
Advanced power management features including Enhanced Intel®
SpeedStep® Technology
Execute Disable Bit support for enhanced security
2.3.3 Front Side Bus (FSB)
The Intel® Atom™ processor on the WAFER-945GSE2 is interfaced to the Intel® 945GSE
Northbridge through a 533 MHz front side bus (FSB). The FSB is shown in
7
Figure 2-5
below.
Figure 2-5: Front Side Bus