IEI Integration WAFER-945GSE2 v1.03 User Manual

Page 5

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WAFER-945GSE2 User Manual

Page v

Table of Contents

1 INTRODUCTION.......................................................................................................... 1

1.1

O

VERVIEW

.................................................................................................................. 2

1.1.1 WAFER-945GSE2 Introduction ......................................................................... 2

1.2

WAFER-945GSE2

O

VERVIEW

.................................................................................. 2

1.2.1 WAFER-945GSE2 Overview Photo ................................................................... 2

1.2.2 WAFER-945GSE2 Peripheral Connectors and Jumpers................................... 3

1.2.3 Technical Specifications..................................................................................... 4

2 DETAILED SPECIFICATIONS .................................................................................. 6

2.1

D

IMENSIONS

............................................................................................................... 7

2.1.1 Board Dimensions.............................................................................................. 7

2.1.2 External Interface Panel Dimensions ................................................................ 7

2.2

D

ATA

F

LOW

................................................................................................................ 8

2.3

E

MBEDDED

WAFER-945GSE2

P

ROCESSOR

.............................................................. 9

2.3.1 Overview ............................................................................................................ 9

2.3.2 Features ............................................................................................................. 9

2.3.3 Front Side Bus (FSB) ....................................................................................... 10

2.4

I

NTEL

®945GSE

N

ORTHBRIDGE

C

HIPSET

..................................................................11

2.4.1 Intel® 945GSE Overview..................................................................................11

2.4.2 Intel® 945GSE DDR2 Controller .....................................................................11

2.4.3 Intel® 945GSE Graphics ................................................................................. 12

2.4.3.1 Analog CRT Graphics Mode..................................................................... 13

2.4.3.2 LVDS Interface ......................................................................................... 13

2.5

I

NTEL

®

ICH7-M

S

OUTHBRIDGE

C

HIPSET

................................................................. 14

2.5.1 Intel

®

ICH7-M Overview ................................................................................. 14

2.5.2 Intel

®

ICH7-M Audio Codec ’97 Controller .................................................... 16

2.5.3 Intel

®

ICH7-M Low Pin Count (LPC) Interface .............................................. 17

2.5.4 Intel

®

ICH7-M PCI Interface........................................................................... 17

2.5.5 PCI-to-ISA Bridge............................................................................................ 18

2.5.6 Intel

®

ICH7-M PCIe Bus ................................................................................. 19

2.5.6.1 PCIe GbE Ethernet.................................................................................... 19

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