Rockwell Automation 1746-FIO4V SLC 500 Fast Analog I/O/ User Manual User Manual

Page 54

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Publication 1746-UM009B-EN-P - September 2007

54 Write Ladder Logic

Example Program for Any SLC Processor

Using the scaling instruction (SCL) requires less ladder logic. The SCL
instruction uses the same multiply, divide, and add algorithm but it
does so with a single rate instead of using scaled range and input
range values. The rate is determined by this formula.

] [

GREATER THAN
Source A
Source B

I:1.0
2047

Rung 2:0
Set in-range bit

Rung 2:1
Check for below range

Rung 2:2
Check for above range

Multiply by the
scaled range

Clear fault bit
from overflow

Add offset

B3/0
(U)

S2:5/0

(U)

LES

GRT

MUL

DDV

ADD

LESS THAN
Source A
Source B

I:1.0
409

MULTIPLY
Source A
Source B
Dest

I:1.0
3276
N7:0

DOUBLE DIVIDE
Source A
Dest

1638
N7:0

ADD
Source A
Source B
Dest

N7:0
–818
N7:0

B3/0
(L)

MOV

MOVE

Source
Dest

0
N7:0

B3/0

B3/0
(U)

MOV

MOVE

Source A
Dest

3276
N7:0

Rung 2:3
Scale the analog input

Divide result
by input range

Rung 2:5

Rung 2:4
Move value to output channel 0

END

MOV

MOVE

Source A
Dest

N7:0
0:1.0

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