Rockwell Automation 1746-HSCE2 Multi-Channel High Speed Counter Module - Manual (Page 89)

Publication 1746-UM002B-EN-P - August 2004
Start Up, Operation, Troubleshooting, and Debug Mode 5-7
due to their unpredictable nature. Even if the configuration block
looks satisfactory in the N10 data file, the data block in the module’s
output image may not be satisfactory.
The best way to check for this problem is to individually search the
ladder logic program for all module output words (O:e.0, O:e.1, etc.).
Carefully check all ladder logic which manipulates the 1746-HSCE2
output image to ensure that the output image is not corrupted during
initialization.
Debug Mode Operation The debug mode allows you to look at the existing module setup of
the programming blocks. When invoked, debug mode echoes back
the programming data instead of showing counts and rates in the
input data file.
Activating Debug Mode
Setting the debug bit (word 0, bit 12) in the programming block
activates the debug mode. You must also set the block type code, the
low byte of word 0, to identify the programming block. The transmit
(TRMT), acknowledge (ACK), and programming error (PERR) bit
operation is unaffected by debug mode. Depending upon the
programming block, other bits may also be required, as described
below.
In the Module Setup Block
For the Module Setup Block, the required bits for the debug mode are
the transmit bit, the debug bit, and the block type byte. All other bits
in the module setup word 0 must be set to 0. Words 1 through 7 are
ignored by the module while in debug mode.
IMPORTANT
The Counter Control block does not support the
debug mode. Setting the debug bit (word 0, bit 12)
in the Counter Control block causes the block to
ignore all commands. However, rates and counts
continue to be counted. When the debug bit is reset,
the module resumes accepting commands.