Receive side functions, Receive side functions -6 – Verilink DIU 2130 (880-503297-001) Product Manual User Manual

Page 16

Advertising
background image

DIU 2130 Overview

1-6

Verilink

Interface Logic and

Loopback

Multiplexer

When handshaking is enabled on the DIU, the interface logic
processes the handshaking control signals between the data port
and the DIU. The loopback multiplexer provides a signal loopback
on a selected data channel when commanded by the controller.

Pulse Stuffing

If the data port is configured for 56 kbit/s or a multiple of this rate,
the DIU sends the data in the first seven bits of every 8-bit block
and transmits a one as the eighth bit. This allows a network
configured with AMI coding to meet minimum density
requirements during normal operation.

If the data port is configured for 64 kbit/s clear-channel
transmission, the data is sent in 8-bit blocks without pulse stuffing
on a network configured for B8ZS coding.

Data Scrambler

The scrambler feature in the DIU 2130 is not a security feature, but
rather it uses an algorithm (xOR*55h) to maximize the ones density
in the data stream.

Data Bus Interface

Multiplexer and

Driver

The backplane data-bus interface multiplexer combines the
channelized data from the two data ports into a composite data
signal. It places the data on the operator-assigned shelf data-bus
for T1 network transmission over the assigned channel time slots.
The backplane interface driver converts the outgoing data to the
RS-422 signal levels required by the assigned data bus.

Test Signal

Generator

When activated, the test code generator substitutes a four-bit
pseudorandom bit sequence (PRBS) signal with a pattern of varying
ones and zeros for the normal data on the selected channel. This
signal is used for end-to-end circuit bit error testing.

Receive Side

Functions

The receive side extracts the incoming data from the associated
CSU, demultiplexes the data, and sends it to the connecting
customer data equipment.

Data Bus Interface

Receiver and

Demultiplexer

The backplane data bus interface receiver converts the incoming
data and clock signals to the format required for data
demultiplexing. The demultiplexer reads the framing data from the
incoming DS1 signal and derives the channelized data signals for
the customer equipment ports.

Interface Logic and

Loopback

Multiplexer

The interface logic and loopback multiplexers operate as
previously described for the transmit side of the DIU. The clock
and data outputs of the interface logic are applied to the interface
driver in TTL format.

Advertising