Tablea.2 lsi53c1030 pci i/o space registers, Lsi53c1030 pci i/o space registers – Avago Technologies LSI53C1030 User Manual

Page 153

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A-3

Version 2.2

Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.

Table A.2

LSI53C1030 PCI I/O Space Registers

Register Name

Offset

Read/Write

Page

System Doorbell

0x00

Read/Write

4-30

Write Sequence

0x04

Read/Write

4-30

Host Diagnostic

0x08

Read/Write

4-31

Test Base Address

0x0C

Read/Write

4-33

Diagnostic Read/Write Data

0x10

Read/Write

4-33

Diagnostic Read/Write Address

0x14

Read/Write

4-34

Reserved

0x18–0x2F

Reserved

Host Interrupt Status

0x30

Read/Write

4-35

Host Interrupt Mask

0x34

Read/Write

4-36

Reserved

0x38–0x3F

Reserved

Request FIFO

0x40

Read/Write

4-37

Reply FIFO

0x44

Read/Write

4-37

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