Ram: 1-port ip core references, Ram: 1-port ip core references -1 – Altera MAX 10 Embedded Memory User Manual
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RAM: 1-Port IP Core References
4
2015.05.04
UG-M10MEMORY
The RAM: 1-Port IP core implements the single-port RAM memory mode.
Figure 4-1: RAM: 1-Port IP Core Signals with the Single Clock Option Enabled
data[]
wren
address[]
rden
addressstall_a
clock
clken
q[]
outaclr
Figure 4-2: RAM: 1-Port IP Core Signals with the Dual Clock Option Enabled
data[]
wren
address[]
rden
addressstall_a
inclock
inclocken
outclock
outclocken
q[]
outaclr
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