Altmemmult ip core references, Altmemmult ip core signals for max 10 devices, Altmemmult ip core references -1 – Altera MAX 10 Embedded Memory User Manual
Page 69: Altmemmult ip core signals for max 10 devices -1
ALTMEMMULT IP Core References
10
2015.05.04
UG-M10MEMORY
The ALTMEMMULT IP core creates only memory-based multipliers using on-chip memory blocks
found in M9K memory blocks.
Figure 10-1: ALTMEMMULT IP Core Signals
data_in[]
coeff_in[]
sload_coeff
clock
sclr
result[]
load_done
ALTMEMMULT IP Core Signals for MAX 10 Devices
Table 10-1: ALTMEMMULT IP Core Input Signals
Signal
Required
Description
clock
Yes
Clock input to the multiplier.
coeff_in[]
No
Coefficient input port for the multiplier. The size of the input port
depends on the
WIDTH_C
parameter value.
data_in[]
Yes
Data input port to the multiplier. The size of the input port depends on the
WIDTH_D
parameter value.
sclr
No
Synchronous clear input. If unused, the default value is active high.
sel[]
No
Fixed coefficient selection. The size of the input port depends on the
WIDTH_S
parameter value.
sload_coeff
No
Synchronous load coefficient input port. Replaces the current selected
coefficient value with the value specified in the
coeff_in
input.
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