Altera Cyclone II FPGA Starter - Manual (Page 33)

Altera Corporation 4–11
October 2006 Cyclone II FPGA Starter Development Kit User Guide
Using the Control Panel
VGA Display For this sample application, three examples illustrate how the
development board produces images on a connected VGA monitor:
■ Example 1 provides a default image previously loaded into an M4K
memory block in the FPGA in the MIF/Hex (Intel) format during the
default bit stream configuration stage (described in
“Configuring the
Cyclone II FPGA” section of the “Using the Development Board”
chapter).
■ Example 2 describes how to download another image from a bitmap
file into the SRAM. The file can also load into an M4K memory block
in the FPGA.
■ Example 3 describes how to use other images to generate binary data
patterns that the development board can display on the VGA
monitor.
Displaying the Default Image
Perform the following steps to display a default image:
1. Select the VGA tab in the Control Panel to display the window in
Figure 4–7 .