Motorola MVME1X7P - Manual (Page 184)

2-94 Computer Group Literature Center Web Site
VMEchip2
2
Interrupt Level Register 4 (bits 16-23)
This register is used to define the level of the VMEbus level 5 (IRQ5)
interrupt and the VMEbus level 6 (IRQ6) interrupt. The IRQ5 and IRQ6
interrupts may be mapped to any local bus interrupt level.
VIRQ5 LEVEL
These bits define the level of the VMEbus IRQ5 interrupt.
VIRQ6 LEVEL
These bits define the level of the VMEbus IRQ6 interrupt.
Interrupt Level Register 4 (bits 8-15)
This register is used to define the level of the VMEbus level 3 (IRQ3)
interrupt and the VMEbus level 4 (IRQ4) interrupt. The IRQ3 and IRQ4
interrupts may be mapped to any local bus interrupt level.
VIRQ3 LEVEL
These bits define the level of the VMEbus IRQ3 interrupt.
VIRQ4 LEVEL
These bits define the level of the VMEbus IRQ4 interrupt.
ADR/SIZ $FFF40084 (8 bits [6 used] of 32)
BIT 23 22 21 20 19 18 17 16
NAME VIRQ6 VIRQ5 LEVEL
OPER R/W R/W
RESET 0 PSL 0 PSL
ADR/SIZ $FFF40084 (8 bits [6 used] of 32)
BIT 15 14 13 12 11 10 9 8
NAME VIRQ4 VIRQ3 LEVEL
OPER R/W R/W
RESET 0 PSL 0 PSL