Motorola MVME1X7P - Manual (Page 42)

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Programming Issues
1
SCSI Interface
The MVME167P and MVME177P single-board computers provide for
mass storage subsystems through the industry-standard SCSI bus. These
subsystems may include hard and floppy disk drives, streaming tape
drives, and other mass storage devices. The SCSI interface is implemented
using the NCR 53C710 SCSI I/O controller.
Support functions for the 53C710 are provided by the PCCchip2 ASIC.
Refer to the 53C710 user’s guide and to
Chapter 3, PCCchip2 for detailed
programming information.
SCSI Termination
It is important that the SCSI bus be properly terminated at both ends.
Sockets for terminators are provided on the P2 or LCP2 adapter board. If
the SCSI bus ends at the adapter board, termination resistors must be
installed on the adapter board. +5V power to the SCSI bus TERM power
line and termination resistors is supplied through a fuse located on the
adapter board (in the case of the MVME167P) or through a fuse on the
MVME712 series transition module and a diode on the adapter board (in
the case of the MVME177P).
Local Resources
The MVME167P and MVME177P single-board computers include many
resources for the local processor. These include tick timers, software-
programmable hardware interrupts, a watchdog timer, and a local bus
timeout.
Programmable Tick Timers
Four 32-bit programmable tick timers with 1
µ
s resolution are available:
two in the VMEchip2 ASIC and two in the PCCchip2 ASIC. The tick
timers may be programmed to generate periodic interrupts to the
processor. Refer to
Chapter 2, VMEchip2 and Chapter 3, PCCchip2
respectively for detailed programming information.