Motorola MVME1X7P - Manual (Page 50)

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Programming Issues
1
Notes
1. For a complete description of the register bits, refer to the data sheet
for the specific chip. For a more detailed memory map refer to the
following detailed peripheral device memory maps.
2. On the MVME1X7P, this area does not return an acknowledge
signal. If the local bus timer is enabled, the access times out and is
terminated by a TEA signal.
3. Byte reads should be used to read the interrupt vector. These
locations do not respond when an interrupt is not pending. If the
local bus timer is enabled, the access times out and is terminated by
a TEA signal.
4. Writes to the LCSR in the VMEchip2 must be 32 bits. LCSR writes
of 8 or 16 bits terminate with a TEA signal. Writes to the GCSR may
be 8, 16 or 32 bits. Reads to the LCSR and GCSR may be 8, 16 or
32 bits.
5. This area does not return an acknowledge signal. If the local bus
timer is enabled, the access times out and is terminated by a TEA
signal.
6. This area does return an acknowledge signal.
7. Size is approximate.
8. Port commands to the 82596CA must be written as two 16-bit
writes: upper word first and lower word second.
9. The CD2401 appears repeatedly from $FFF45200 to $FFF45FFF
on the MVME1X7P. If the local bus timer is enabled, the access
times out and is terminated by a TEA signal.