Motorola MVME1X7P - Manual (Page 35)

Programming Interfaces
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1
MVME177
The EEPROMs on the MVME177 share 2MB of memory with the first
2MB of Flash memory. The EEPROM can co-exist with 2MB of Flash, or
you may wish to program all 4MB as Flash memory. The Flash and
EEPROM configuration is jointly controlled by a configuration switch
(S4) as described in Chapters 1 and 4 of MVME177P Single Board
Computer Installation and Use, and by control bit GPIO2 in the
VMEchip2 ASIC, as described in
Chapter 2, VMEchip2 .
The EPROMs are mapped to Local Bus address 0 following a Local Bus
reset.This allows the MC68060 processor to access the reset vector and
execution address following a reset.
Flash Memory on the MVME177
The MVME177 includes four 28F008SA Flash memory devices. The 32-
bit wide Flash can support 8-, 16-, and 32-bit accesses. The Flash can be
used for the onboard debugger firmware, which can be downloaded from
I/O resources such as Ethernet, SCSI, serial port, or VMEbus. Flash write-
protection is programmable by setting a control bit (GPIO bit 1) in the
VMEchip2 GPIO register after downloading.
When the Flash memory is used with EEPROM, only the top or bottom
2MB of Flash memory is visible at any one time. For access to the
shadowed area of Flash, the 177Bug firmware provides the SFLASH
command.
The MVME177 is shipped with the top 2MB of Flash memory and
EEPROM mapped as illustrated by Map 2 in
Figure 1-3 .
The 177Bug is shipped in EEPROM. To map all 4MB of Flash and retain
access to the 177Bug, perform the following steps:
1. Map Flash and EEPROM as shown in Map 3 in Figure 1-3.
2. Copy the 177Bug into the bottom 2MB of Flash memory.
3. Remap Flash memory as shown in Map 1 in Figure 1-3.