Samsung S3F401F - Manual (Page 42)

BASIC TIMER & WDT S3F401F_UM_REV1.00
3-2
2. FUNCTION DESCRIPTION
2.1 INTERVAL TIMER FUNCTION
The primary function of Basic Timer is to measure the elapsed time between events. The standard time interval is
equal to 256 basic timer clock pulses, which is an overflow signal from 8-bit Basic Timer.
The content of 8-bit counter register, BTCNT, is increased it content every when a clock signal is detected which
corresponds to the frequency selected by BTCON. The BTCNT continues its counting until an overflow occurs, i.e.,
the content reaches to 255. An overflow can cause the BT interrupt pending flag to be set, which signals that the
designated time interval has elapsed. In this case, when an interrupt request is generated, BTCNT is cleared to all
zero, and the counting continues from 0x00, again.
2.1.1 Oscillation Stabilization Using Interval Timer Function
You can use the Basic Timer to have programmable delay time, which is necessary for stabilizing the clock signal
from oscillator circuit after reset or Stop mode release.
When the S3F401F is in Stop mode, the reset or external interrupt request can wake up the S3F401F. Please
understand that the oscillator circuit is in disable state when the S3F401F is in Stop mode. In case of wake-up by
reset, the oscillator should start first. Because the default clock division ratio is Fin / 2^12, the Fin / 2^12 clock will be
fed to the 8-bit Basic Timer. When an overflow occurs from Bit 4 of BTCNT register(Not using 8-bit, but 4-bit of Basic
Timer), this kind of overflow signal can release the clock blocking to CPU. In other word, the normal clock can be fed
to S3F401F when an overflow of Bit 4 in Basic Timer. In case of wake-up by external interrupt request, the only
difference from reset, is clock division ratio. While we should use the default value of clock division ratio for the case
of wake-up by reset, we use the pre-defined value of clock division ratio before entering into Stop mode for the case
of wake-up by external interrupt request. In any case, the CPU can resume its operation when normal clock can be
fed to the blocks in S3F401F.
In summary, please take following sequence for releasing S3F401F from Stop mode:
1. When S3F401F is in Stop mode, the escape from Stop mode can be made by a power-on reset or an external
interrupt. At same time, the oscillator can start its oscillation.
2. In case of wake-up by power-on reset, the Basic Timer will increase its content(BTCNT) at the rate of Fin / 2^12,
which is the default rate of clock division ration. In case of wake-up by external interrupt request, the Basic Timer
will increase its content (BTCNT) at the rate of preset value, which is written before entering into Stop mode.
3. The normal clock from oscillator will be delayed to be fed to all logic blocks inside S3F401F until the 4
th
bit of
Basic Timer is generated. It means that you can use the Basic Timer to guarantee the stable clock from
oscillator, i.e., waiting up to stable oscillation.
4. When the normal clock can be fed to S3F401F, the S3F401F can resume the operation.