Samsung S3F401F - Manual (Page 52)

ENCODER COUNTER S3F401F_UM_REV1.00
4-4
3. REGISTERS DESCRIPTION
Table 4-1. ENC Special Function Registers
Offset Address Register Description R/W Reset value
0x000 ENCCON0 Encoder counter control register 0 R/W 0x0000_0000
0x004 ENCCON1 Encoder counter control register 1 R/W 0x0000_0000
0x008 ENCSTATUS Encoder counter status register R/W 0x0000_0000
0x00C PCNT 16bit Position counter register R/W 0x0000_0000
0x010 PREF 16bit Position reference register R/W 0x0000_0000
0x014 SCNT 16bit Speed counter register R/W 0x0000_0000
0x018 SREF 16bit Speed reference register R/W 0x0000_0000
0x01C PACNT 16bit Phase A capture counter register R/W 0x0000_0000
0x020 PACAP 16bit Phase A capture data register R/W 0x0000_0000
0x024 PBCNT 16bit Phase B capture counter register R/W 0x0000_0000
0x028 PBCAP 16bit Phase B capture data register R/W 0x0000_0000
NOTE: The PCNT, SCNT are 2’s complement. The range of PCNT and SCNT are -2
15
~ (+2
15
-1).
Base Address
− ENC0: 0xFF02_8000
− ENC1: 0xFF02_C000