Figure 9-28. pulse generation for ets, Counter timing signals, Counter timing signals -25 – National Instruments NI USB-621x User Manual
Page 105
Chapter 9
Counters
© National Instruments Corporation
9-25
frequency of the system. Figure 9-28 shows an example of pulse generation
for ETS; the delay from the trigger to the pulse increases after each
subsequent Gate active edge.
Figure 9-28. Pulse Generation for ETS
For information about connecting counter signals, refer to the
section.
Counter Timing Signals
USB M Series devices feature the following counter timing signals.
•
Counter n Source
•
Counter n Gate
•
Counter n Aux
•
Counter n A
•
Counter n B
•
Counter n Z
•
Counter n Up_Down
•
Counter n HW Arm
•
Counter n Internal Output
•
Counter n TC
•
Frequency Output
In this section, n refers to either Counter 0 or 1. For example, Counter n
Source refers to two signals—Counter 0 Source (the source input to
Counter 0) and Counter 1 Source (the source input to Counter 1).
OUT
D1
D2 = D1 +
ΔD D3 = D1 + 2ΔD
GATE