National Instruments NI USB-621x - Manual (Page 43)

Chapter 4 Analog Input
© National Instruments Corporation 4-17 NI USB-621x User Manual
channel to allow for adequate settling time. This scheme enables the
channels to approximate simultaneous sampling and still allow for
adequate settling time. If the AI Sample Clock rate is too fast to allow for
this 10 µs of padding, NI-DAQmx chooses the conversion rate so that the
AI Convert Clock pulses are evenly spaced throughout the sample.
To explicitly specify the conversion rate, use AI Convert Clock Rate
DAQmx Timing property node or function.
Caution Setting the conversion rate higher than the maximum rate specified for your
device will result in errors.
Using an Internal Source
One of the following internal signals can drive ai/ConvertClock:
• AI Convert Clock Timebase (divided down)
• Counter n Internal Output
A programmable internal counter divides down the AI Convert Clock
Timebase to generate ai/ConvertClock. The counter is started by
ai/SampleClock and continues to count down to zero, produces an
ai/ConvertClock, reloads itself, and repeats the process until the sample is
finished. It then reloads itself in preparation for the next ai/SampleClock
pulse.
Using an External Source
Use the external signals PFI <0..3> or PFI <8..11> as the source of
ai/ConvertClock:
Routing AI Convert Clock Signal to an Output
Terminal
You can route ai/ConvertClock (as an active low signal) out to any
PFI <4..7> or PFI <12..15> terminal.
Using a Delay from Sample Clock to Convert Clock
When using an internally generated ai/ConvertClock, you also can specify
a configurable delay from ai/SampleClock to the first ai/ConvertClock
pulse within the sample. By default, this delay is three ticks of
ai/ConvertClockTimebase.