National Instruments Deterministic Ethernet Expansion Chassis NI 9144 - Manual (Page 57)

© National Instruments Corporation 57 NI 9144 User Guide and Specifications
NI 9237 Example Data Rates
Example data rates use a 12.8 MHz clock source.
Offset Cal Enable <3..0>
Controls the offset calibration mode. Offset calibration mode disconnects both signal input pins and
forces the channel inputs to zero volts, enabling measurement of the channel’s offset voltage. A
logic 1 in any bit enables offset calibration for the respective channel, while a logic 0 disables it.
Clock Divisor
The NI 9237 divides the clock source (internal or external) by this value and uses it as the
converters’ oversample clock. The data rate is equal to 1/256 times this oversample clock frequency.
The final data rate must be between 391 kS/s and 52.734 kS/s. This means that while all values from
1 to 31 are within the specified operating range when using the 12.8 MHz internal clock source, for
external clock sources of more than 13.5 MHz or less than 3.1 MHz the valid divisors are limited to
those that provide data rates within the specified range.
Table 52. NI 9237 Example Data Rates
Data Rate Clock Divisor Clock Source Rate Byte
Oversample
Clock Rate
50.000 kS/s 00001 10 0x06 12.80 MHz
25.000 kS/s 00010 10 0x0A 6.40 MHz
16.667 kS/s 00011 10 0x0E 4.27 MHz
12.500 kS/s 00100 10 0x12 3.20 MHz
10.000 kS/s 00101 10 0x16 2.56 MHz
6.250 kS/s 01000 10 0x22 1.60 MHz
5.000 kS/s 01010 10 0x2A 1.28 MHz
3.333 kS/s 01111 10 0x3E 853.3 KHz
2.500 kS/s 10100 10 0x52 640.0 KHz
2.000 kS/s 11001 10 0x66 512.0 KHz