Chapter 10 bus interface, Mite and daq-pnp, Pxi considerations – National Instruments Network Device DAQ S User Manual

Page 131: Pxi clock and trigger signals, Pxi express, Mite and daq-pnp -1 pxi considerations -1, Pxi clock and trigger signals -1 pxi express -1, Chapter 10, Bus interface

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© National Instruments Corporation

10-1

NI 6124/6154 User Manual

10

Bus Interface

Each S Series device is designed on a complete hardware architecture that
is deployed on the following platforms:

PCI

PXI Express

Using NI-DAQmx driver software, you have the flexibility to change
hardware platforms and operating systems with little or no change to
software code.

MITE and DAQ-PnP

All S Series devices are jumperless for complete plug-and-play operation.
The operating system automatically assigns the base address, interrupt
levels, and other resources.

NI S Series PCI/PXIe devices incorporate PCI-MITE technology to
implement a high-performance PCI interface.

PXI Considerations

(NI 6124 Only)

PXI clock and trigger signals are only available on PXI and

PXI Express devices.

PXI Clock and Trigger Signals

(NI 6124 Only)

Refer to the

PXI_CLK10

,

PXI Triggers

,

PXI_STAR Trigger

,

and

PXI_STAR Filters

sections of Chapter 9,

Digital Routing and Clock

Generation

, for more information about PXI clock and trigger signals.

PXI Express

(NI 6124 Only)

NI PXI Express S Series devices can be installed in any PXI

Express slot or PXI hybrid slots in PXI Express chassis. PXI specifications
are developed by the PXI System Alliance (

www.pxisa.org

).

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