National Instruments Network Device DAQ S User Manual

Page 51

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Chapter 5

Analog Output

© National Instruments Corporation

5-3

NI 6124/6154 User Manual

Hardware-Timed Generations—With a hardware-timed generation,
a digital hardware signal controls the rate of the generation. This signal
can be generated internally on your device or provided externally.

Hardware-timed generations have several advantages over
software-timed generations:

The time between samples can be much shorter.

The timing between samples can be deterministic.

Hardware-timed generations can use hardware triggering. For
more information, refer to Chapter 11,

Triggering

.

Hardware-timed operations can be buffered or non-buffered. A buffer
is a temporary storage in computer memory for acquired or
to-be-generated samples.

Buffered—In a buffered generation, data is moved from a PC
buffer to the DAQ device’s onboard FIFO using DMA or
interrupts before it is written to the DACs one sample at a time.
Buffered generations typically allow for much faster transfer rates
than non-buffered generations because data is moved in large
blocks, rather than one point at a time. For more information about
DMA and interrupts, refer to the

Data Transfer Methods

section

of Chapter 10,

Bus Interface

.

One property of buffered I/O operations is the sample mode. The
sample mode can be either finite or continuous.

Finite sample mode generation refers to the generation of a
specific, predetermined number of data samples. When the
specified number of samples has been written out, the generation
stops.

Continuous generation refers to the generation of an unspecified
number of samples. Instead of generating a set number of data
samples and stopping, a continuous generation continues until
you stop the operation. There are several different methods of
continuous generation that control what data is written. These
methods are regeneration, FIFO regeneration and
non-regeneration modes.

Regeneration is the repetition of the data that is already in the
buffer. Standard regeneration is when data from the PC buffer is
continually downloaded to the FIFO to be written out. New data
can be written to the PC buffer at any time without disrupting the
output.

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