Rockwell Automation 1772-LV Mini-PLC - 2/15 Programmable Controller (Series B) Programming and Operations User Manual

Page 154

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Special Programming Techniques

Chapter 11

11Ć7

Here is a explanation to help you understand the sample rung:

1.

During the program scan when input switch 11302 is true, the read enable
bit 01217 is set to 1.

2.

In the next scan of the output image table, the data in 01217 is sent to the
module.

3.

The I/O module responds (ready for transfer).

4.

The processor interrupts the output image table scan and begins to search
the timer/counter’s accumulated area of the data table.

5.

The processor locates the address 121 in word address 030 and locates the
file address 060, 100 above 030 in word address 130.

6.

The processor transfers the data from the I/o module to processor’s data
table word address 060-067.

7.

The done bit (11217) is set. This completes the transfer.

8.

The processor completes the I/O scan.

NOTE: This same discussion applies when programming multiple write
instructions of different block lengths to one module.

Under certain conditions, it may be desirable to transfer part of a file rather than
the entire file. For example, a processor could be programmed to read the first
two or three channels of an analog input module periodically but read all
channels less frequently. To do this, two or more block transfer read
instructions would be used: one for each desired block length starting at the
same first word. The read instructions would have the same module address,
data address and file address. The size of the file would equal the larger block
length.

When two or more block transfer instructions have a common module address,
careful programming is required to compensate for the following possible
situations:

During any program scan, data in the output image table byte can be changed
alternately by each successive block transfer instruction having a common
module address. The enable bit can be turned on or off alternately according to
the true or false condition of the rungs containing these instructions. The on or
off status of the last rung will govern whether the transfer will occur.

Secondly, the block length can be changed alternately in accordance with the
block lengths of the enable instructions. The block length of the last enabled
block transfer instruction having a common module address will govern the
number of words transferred.

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