ADLINK cPCI-9116 - Manual (Page 35)

Registers
• 25
CH3 ~ CH0 (bit11~ bit8): Internal A/D Channel selection bits
EN3 ~ EN0 (bit7~ bit4): Multiplexer Enable selection bits
Gain1~Gain0 (bit13~bit12): Gain selection bits
Gain1 Gain0 Gain
0 0 1
0 1 2
1 0 4
1 1 8
Table 9. Gain Selection Bits
HL_sel(bit3): >31 channel selection (single ended)
1: when channel number is larger than 31
0: when channel number is smaller than or equal to 31
DIFF(bit1): Analog Input Signals Type
1: Differential
0: Single ended
UNIP(bit2): Analog Input Signals Polarity
1: Unipolar
0: Bipolar
U_CMMD(bit0): User Defined Common Mode Selection
1: User Defined Common Mode (Pin 1)
0: Local Ground of 9116 series