ADLINK cPCI-9116 - Manual (Page 40)

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• Registers
4.10 A/D Trigger Mode Register
Address: BASE + 0x34
Attribute: write only
Data Format:
Bit 7 6 5 4 3 2 1 0
Retrig DLYSRC
Time
Base
TrgP MODE2 MODE1 MODE0 ---
Bit 15 14 13 12 11 10 9 8
--- --- --- --- --- softconv ACQ_EN M_enable
Bit 23 22 21 20 19 18 17 16
--- --- --- --- --- --- --- ---
Bit 31 30 29 28 27 26 25 24
--- --- --- --- --- --- --- ---
Table 14. A/D Trigger Mode Register
softconv (bit10): ADC direct conversion control
1: generate 1 convert pulse
0: no effect
ACQ_EN (bit9): Acquisition enable bit
1: enable the acquisition timing
0: disable the acquisition timing
M_enable (bit8): M counter enable bit
1: ignore trigger signals before M counter reaches 0
0: accept the trigger signal anytime
Retrig (bit7): Re-triggerability in an acquisition
1: Re-triggerable
0: trigger only once
DLY SRC (bit6): Delay time unit in delay trigger mode
1: delay in sampling rate (SI2)
0: delay in Timebase