ADLINK cPCI-9116 - Manual (Page 45)

Operation Theory
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5.1.2 Software conversion with polling data transfer acquisition
mode (Software Polling)
This is the easiest way to acquire a single A/D data. The A/D converter starts a
conversion when the user writes 1 into bit10 of the A/D trigger mode register
(BASE+34). After the software initializes the A/D conversion, the software polls
the FIFO Empty status (bit4) in the A/D & FIFO Status register (BASE+28)
until it changes to active low logic.
If the Data FIFO is empty before an A/D conversion starts, the Empty bit will be
high. After the A/D conversion is completed, the A/D data is written to the Data
FIFO immediately, thus the Empty becomes low. You can consider the Empty
bit as a flag to indicate the converted data ready status. That is, a low Empty
bit meaning the data is ready. The A/D data is now ready to be transferred to
host memory from the FIFO.
This method is suitable for applications that needs to process AD data in real
time. Under this mode, the timing of the A/D conversion is fully controlled by
the software. However, it is difficult to control a fixed A/D conversion rate
unless another timer interrupt service routine is used to generate a fixed
conversion rate trigger.
ADLINK’s software driver provides an integral function to acquire a single data
(That is, it will start an A/D conversion, then poll the Empty flag and read the
data back when the data is ready). We also provide individual functions to
allow users to start an A/D conversion only. Users must read it back from the
A/D data register (BASE+24) by themselves. This method makes it possible to
read A/D converted data without polling. The conversion and acquisition time
of the ADC does not exceed 4
μs. Hence, after software conversion, the
software need only wait for a maximum of 4
μs to read the A/D Data Register
without polling.