Altera DisplayPort MegaCore Function - Manual (Page 100)

Figure 7-7: Reconfiguration Top Manager FSM for Arria 10 Devices
This flow chart shows the reconfiguration FSM flow for Arria 10 transceivers. When the transceiver
detects a reconfiguration request (*_reconfig_req), it triggers the reconfiguration manager to reconfigure
RX, TX, and TX Analog, and exercise the respective Avalon-MM cycle in sequence.
FSM_START_RECONFIG
FSM_IDLE
rx_reconfig_req = 1
yes
no
tx_pll_reconfig_req = 1
yes
no
A10_dp_txpll_reconfig_mgmt
tx_reconfig_req = 1
yes
no
A10_dp_tx_reconfig_mgmt
A10_dp_rx_reconfig_mgmt
FSM_END_RECONFIG
rx_reconfig_req | tx_pll_reconfig_req | tx_reconfig_req
7-12 Arria 10 Finite-State Machine (FSM)
UG-01131
2015.05.04
Altera Corporation DisplayPort IP Core Simulation Example
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