Altera DisplayPort MegaCore Function - Manual (Page 69)

Interface Port Type Clock Domain Port Direction Description
RX link rate Conduit asynchronou
s
rx_link_
rate[1:0]
Input DisplayPort RX link rate.
• 00 = RBR (1.67 Gbps)
• 01 = HBR (2.70 Gbps)
• 10 = HBR2 (5.40
Gbps)
You need this informa‐
tion for the clock
recovery clock to
correctly calculate the
fPLL parameters.
RX MSA Conduit rx_link_clk rx_
msa[216:0]
Input A set of different signals
containing the following
information:
• MSA attributes and
status
• VB-ID attributes and
status
• Received video
blanking timing
You must connect this
set of signals as is from
the DisplayPort IP core
to the clock recovery
core.
6-8 Clock Recovery Interface
UG-01131
2015.05.04
Altera Corporation DisplayPort IP Core Hardware Demonstration
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