Altera Stratix IV GX FPGA Development Board - Manual (Page 45)

Chapter 2: Board Components 2–37
Components and Interfaces
November 2010 Altera Corporation Stratix IV GX FPGA Development Board, 530 Edition Reference Manual
J1.33 Management serial data HSMA_SDA
2.5-V
AJ11
J1.34 Management serial clock HSMA_SCL L11
J1.35 JTAG clock signal FPGA_JTAG_TCK —
J1.36 JTAG mode select signal FPGA_JTAG_TMS —
J1.37 JTAG data output HSMA_JTAG_TDO —
J1.38 JTAG data input HSMA_JTAG_TDI —
J1.39 Dedicated CMOS clock out HSMA_CLK_OUT0 AM29
J1.40 Dedicated CMOS clock in HSMA_CLK_IN0 AB34
J1.41 Dedicated CMOS I/O bit 0 HSMA_D0 AW10
J1.42 Dedicated CMOS I/O bit 1 HSMA_D1 AV10
J1.43 Dedicated CMOS I/O bit 2 HSMA_D2 AW7
J1.44 Dedicated CMOS I/O bit 3 HSMA_D3 AV7
J1.47 LVDS TX bit 0 or CMOS bit 4 HSMA_TX_D_P0
LVDS or 2.5-V
AN9
J1.48 LVDS RX bit 0 or CMOS bit 5 HSMA_RX_D_P0 AT9
J1.49 LVDS TX bit 0n or CMOS bit 6 HSMA_TX_D_N0 AP9
J1.50 LVDS RX bit 0n or CMOS bit 7 HSMA_RX_D_N0 AU9
J1.53 LVDS TX bit 1 or CMOS bit 8 HSMA_TX_D_P1 AN7
J1.54 LVDS RX bit 1 or CMOS bit 9 HSMA_RX_D_P1 AT8
J1.55 LVDS TX bit 1n or CMOS bit 10 HSMA_TX_D_N1 AP7
J1.56 LVDS RX bit 1n or CMOS bit 11 HSMA_RX_D_N1 AU8
J1.59 LVDS TX bit 2 or CMOS bit 12 HSMA_TX_D_P2 AE13
J1.60 LVDS RX bit 2 or CMOS bit 13 HSMA_RX_D_P2 AP8
J1.61 LVDS TX bit 2n or CMOS bit 14 HSMA_TX_D_N2 AE12
J1.62 LVDS RX bit 2n or CMOS bit 15 HSMA_RX_D_N2 AR8
J1.65 LVDS TX bit 3 or CMOS bit 16 HSMA_TX_D_P3 AL8
J1.66 LVDS RX bit 3 or CMOS bit 17 HSMA_RX_D_P3 AW6
J1.67 LVDS TX bit 3n or CMOS bit 18 HSMA_TX_D_N3 AM8
J1.68 LVDS RX bit 3n or CMOS bit 19 HSMA_RX_D_N3 AW5
J1.71 LVDS TX bit 4 or CMOS bit 20 HSMA_TX_D_P4 AK9
J1.72 LVDS RX bit 4 or CMOS bit 21 HSMA_RX_D_P4 AV5
J1.73 LVDS TX bit 4n or CMOS bit 22 HSMA_TX_D_N4 AL9
J1.74 LVDS RX bit 4n or CMOS bit 23 HSMA_RX_D_N4 AW4
J1.77 LVDS TX bit 5 or CMOS bit 24 HSMA_TX_D_P5 AK8
J1.78 LVDS RX bit 5 or CMOS bit 25 HSMA_RX_D_P5 AT7
J1.79 LVDS TX bit 5n or CMOS bit 26 HSMA_TX_D_N5 AK7
J1.80 LVDS RX bit 5n or CMOS bit 27 HSMA_RX_D_N5 AU7
J1.83 LVDS TX bit 6 or CMOS bit 28 HSMA_TX_D_P6 AH10
J1.84 LVDS RX bit 6 or CMOS bit 29 HSMA_RX_D_P6 AT6
Table 2–37. HSMC Port A Pin Assignments, Schematic Signal Names, and Functions (Part 2 of 4)
Board
Reference
Description
Schematic Signal
Name
I/O Standard
Stratix IV GX
Device
Pin Number