Artesyn iVPX7225 Installation and Use (April 2015) - Manual (Page 120)

FPGA Registers
iVPX7225 Installation and Use (6806800S11C) 101
7.1.2 FPGA Major Revision Register - 0x01
7.1.3 FPGA Minor Revision Register - 0x02
7.1.4 FPGA Date Code Register - 0x04
Table 7-2 FPGA Major Revision Register - 0x01
Bit # Description Default LPC Access I2C Access
7:0 Major Version Register
Incremented by one for each major release. - RO RO
Table 7-3 FPGA Minor Revision Register - 0x02
Bit # Description Default LPC Access I2C Access
7:0 Minor Version Register
Incremented by one for each minor release. - RO RO
Table 7-4 FPGA Date Code Register - 0x04
Bit # Description Default LPC Access I2C Access
7:0 Date Register - RO RO