Artesyn iVPX7225 Installation and Use (April 2015) - Manual (Page 145)

FPGA Registers
iVPX7225 Installation and Use (6806800S11C) 126
Registers 0x60 (MSB) and 0x61 (LSB) set the Logical Device Base IO for this logical device. For
example for Base IO address 0x3F8 the content of Register 0x60 is 0x03 and the content of
Register 0x61is 0xF8.
See table below for default IO addresses:
Table 7-39 Logical Device Base IO Address MSB Register
Index Address: 0x60
Bit # Description Default Access
7:0 Logical Device Base IO Address MSB 0 LPC: R/W
Table 7-40 Logical Device Base IO Address LSB Register
Index Address: 0x61
Bit # Description Default Access
2:0 Bits 0 to 2 are read only. Decode is on 8 Byte
boundary. 0 LPC: R
7:3 Logical Device Base IO Address LSB. (Bits 3 to
7) 0 LPC: R/W
Table 7-41 Logical Device Common Decode Ranges
IO Address range Description
0x3F8 – 0x3FF COM1
0x2F8 – 0x2FF COM2
0x2E8 – 0x2EF COM3