Fluke Biomedical 942A-200L-M4 - Manual (Page 34)

942A-200L-M4 & 942A-200L-M5 UDR
Operator Manual
2-20
When U93-2 counter enable is brought high, under software control to initiate a sample period, and the
low discriminator threshold is exceeded, a positive going edge on U93-3 clocks a high into flip-flop U93-5.
Assuming the high discriminator has not been exceeded, when the input pulse returns through the low
discriminator threshold, a positive going edge on U93-11 clocks the high on U93-12 to the output U93-9.
A delayed positive pulse produced by the R/C network (R80/C35) on U93-13 allows the flip-flop output
U93-9 to remain high until the delayed pulse on U93-13 returns low, which resets the output U93-9 low.
U93-9 is connected to the signal multiplexer circuitry as described below.
When an input pulse exceeds both the high and low discriminators, the high (U93-5) clocked by the
transition through the low discriminator is reset by the low (U91-1) resulting from the transition through the
high discriminator. This action causes no pulse to be generated at U93-9.
Signal Multiplexer
The signal mutiplexer comprised of U101, U102, and U94 allows the MPU to select either the radiation
pulse or the frequency output representing the high voltage to be input to the gross counters. When
COUNTER ENABLE is active (high), the signal detection circuit output (representing radiation) is routed
to the gross counters. When HV SELECT is active (high), the HV frequency HVf is routed to the gross
counters. The outputs connected to pull-up resistor R81, are open collectors allowing the most significant
bit of the counters to force this node low, effectively terminating the pulse input to the counters and
indicating an overflow condition.
Anti-Jam Circuitry
The anti-jam circuitry allows for the detection of rapid increase in pulses (due to a rapid increase in
radiation at the detector) and provides a bit to the sensitivity select register. A detector will reach a point,
in a very high radiation field, when it will no longer provide pulses, but conducts continuously. The
absence of pulses would normally indicate a low radiation field, when in actuality this is not the case. The
purpose of the anti-jam circuit is to detect that this situation is about to occur, and to indicate it to the
MPU. The MPU will then shut down the high voltage.
The input to the anti-jam circuit is provided by the low discriminator output (U91-6). JP7 selects detector
type, 1-2 for scintillation detectors and 2-3 for GM type. Q3 turns ON/OFF with input pulses, which allows
C39 to charge to an average DC level. VR12 (adjustment range 0 to 1.6 volts) is used to adjust the trip
threshold on comparator U92-2. When the repetition rate of the input pulse causes C39 to charge and
the DC level to exceed the threshold, comparator output U92-1 (low in normal operation) is forced high.
When this occurs, U96-2 goes high (U96-1 is high after power-up) U93-3 goes low and U96-4 goes high.
Diode D9 effectively latches this circuit in the jam mode. That is, if C39 discharges (due to absence of
input pulses) and U92-1 goes low, D9 becomes forward biased which holds U92-2 high. The high, now
on U96-4 causes Q4 to turn on driving Q5 on, forcing U96-8, & 9 node to ground. In normal operation,
JP6 is in position 1-2 allowing high current flow through F1 (1/20 Amp fuse) causing it to blow. R82 will
now hold U96-8, & 9 node at ground, causing U96-10 (anti-jam bit) to be active (high). At this point,
normal operation can only be achieved by replacing fuse F1. Jumper JP6 - position 2-3 is for test
purposes only and allows fuse F1 to be removed from the circuit and R79 provides pull-up to +5 volts. In
this mode, cycling of power resets the anti-jam circuit.
R93/C41 on U96-1 provides a delay from power-up tp inhibit false tripping of the anti-jam circuit.
Voltage to Frequency Converter
The V/F converter (U100) monitors the high voltage supply and outputs a frequency to the signal
multiplexer, allowing the MPU to determine and display the detector high voltage. The input to the V/F
circuit is provided in a 1000:1 ratio by the HV supply board. VR3 adjusts the gain of the converter. A 1
volt (representing 1000 volts) causes a frequency output of 10 kHz. Likewise, a 0.6 volt input
(representing 600 volts) produces a frequency of 6 kHz. Therefore, f out = V in x 10,000.