Avago Technologies LSI53C825AE - Manual (Page 170)

4-82 Registers
Register: 0x48 (0xC8)
SCSI Timer Zero (STIME0)
Read/Write
HTH[3:0] Handshake-to-Handshake Timer Period [7:4]
These bits select the handshake-to-handshake time-out
period, the maximum time between SCSI handshakes
(SREQ/ to SREQ/ in target mode, or SACK/ to SACK/ in
the initiator mode). When this timing is exceeded, an
interrupt is generated and the HTH bit in the
SCSI
Interrupt Status One (SIST1) register is set. Table 4.7
contains time-out periods for the Handshake-to-
Handshake Timer, the Selection/Reselection Timer (bits
[3:0]), and the General Purpose Timer (
SCSI Timer One
(STIME1), bits [3:0]). For a more detailed explanation of
interrupts, refer to Chapter 2, “Functional Description.”
7 4 3 0
HTH[3:0] SEL[3:0]
0 0 0 0 0 0 0 0