Avago Technologies LSI53C825AE - Manual (Page 297)

Index IX-7
synchronous
clock conversion factor (SCF[2:0]) 4-28
synchronous data transfer rates 2-33
T
table indirect 5-21
mode 5-20
table relative 5-21
target
mode 5-9
,
5-15
SATN/ active (M/A) 4-74
mode (TRG) 4-23
timing 6-15
target asynchronous receive 6-48
target asynchronous send 6-47
TEMP register 5-38
temporary (TEMP) 4-55
termination 2-29
third dword 5-38
timer test mode (TTM) 4-91
TolerANT 6-7
enable (TE) 4-90
technology
electrical characteristics 6-7
TolerANT technology 1-3
benefits 1-4
totem pole output 3-4
transfer
control instructions 5-29
count 5-38
counter 5-12
transfer rate
synchronous 2-33
U
unexpected disconnect (UDC) 4-72
,
4-75
use data8/SFBR 5-26
V
vendor
unique enhancement, bit 1 (VUE1) 4-27
unique enhancements, bit 0 (VUE0) 4-27
W
wait
disconnect instruction 5-18
for valid phase 5-36
reselect instruction 5-19
select instruction 5-16
wide SCSI
chained block moves 2-42
receive (WSR) 4-28
send (WSS) 4-27
won arbitration (WOA) 4-44
write
read instructions 5-24
read system memory from SCRIPTS 5-38
write and invalidate
enable (WRIE) 4-55