Figure1.2 lsi53c825a chip block diagram – Avago Technologies LSI53C825AE User Manual
Page 24
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1-10
Introduction
Figure 1.2
LSI53C825A Chip Block Diagram
PCI Master and Slave Control Block
Data
FIFO
536 Bytes
Memory
Control
SCSI
SCRIPTS
Processor
Operating
Registers
Configuration
Registers
SCRIPTS
RAM
SCSI FIFO and SCSI Control Block
Local
Bus
Memory
TolerANT Drivers and Receivers
SCSI Bus
External
Memory
PCI
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