Avago Technologies LSI53C825AE - Manual (Page 242)

6-14 Specifications
– PCI Configuration Register Write
– Operating Register/SCRIPTS RAM Read
– Operating Register/SCRIPTS RAM Write
– External Memory Read
– External Memory Write
•
Initiator Timing
– Nonburst Opcode Fetch
– Burst Opcode Fetch
– Back-to-Back Read
– Back-to-Back Write
– Burst Read
– Burst Write
•
External Memory Timing
– Read Cycle, Normal/Fast Memory (
≥
64 Kbytes), Single Byte
Access
– Write Cycle, Normal/Fast Memory (
≥
64 Kbytes), Single Byte
Access
– Read Cycle, Normal/Fast Memory (
≥
64 Kbytes), Multiple Byte
Access
– Write Cycle, Normal/Fast Memory (
≥
64 Kbytes), Multiple Byte
Access
– Read Cycle, Slow Memory (
≥
64 Kbytes)
– Write Cycle, Slow Memory (
≥
64 Kbytes)
– Read Cycle, Normal/Fast Memory (
≥
64 Kbytes)
– Write Cycle, Normal/Fast Memory (
≥
64 Kbytes)
– Read Cycle, Slow Memory (
≤
64 Kbytes)
– Write Cycle, Slow Memory (
≤
64 Kbytes)