Table 4.7 timeout periods, Timeout periods, Table 4.7 – Avago Technologies LSI53C825AE User Manual
Page 171

Operating Registers
4-83
SEL[3:0]
Selection Time-Out
[3:0]
These bits select the SCSI selection/reselection time-out
period. When this timing (plus the 200
µ
s selection abort
time) is exceeded, the STO bit in the
register is set. For a more detailed
explanation of interrupts, refer to
Table 4.7
Timeout Periods
HTH[7:4],
SEL[3:0],
GEN[3:0]
1
Minimum Timeout
(40 or 160 MHz)
Minimum Timeout
(50 MHz)
0000
Disabled
Disabled
0001
125
µ
s
100
µ
s
0010
250
µ
s
200
µ
s
0011
500
µ
s
400
µ
s
0100
1 ms
800
µ
s
0101
2 ms
1.6 ms
0110
4 ms
3.2 ms
0111
8 ms
6.4 ms
1000
16 ms
12.8 ms
1001
32 ms
25.6 ms
1010
64 ms
51.2 ms
1011
128 ms
102.4 ms
1100
256 ms
204.8 ms
1101
512 ms
409.6 ms
1110
1.024 s
819.2 ms
1111
2.048 s
1.6384 s
1. These values are correct if the CCF bits in the
register are set according to the valid
combinations in the bit description.