Avago Technologies LSI53C825AE - Manual (Page 283)

LSI53C825A/825AE PCI to SCSI I/O Processor A-1
Appendix A
Register Summary
Table A.1 lists the LSI53C825A configuration registers by register name.
Table A.1 Configuration Registers
Register Name Address Read/Write Page
Base Address One (Memory) 0x14 Read/Write 4-9
Base Address Zero (I/O) 0x10 Read/Write 4-9
Bridge Support Extensions (PMCSR_BSE) 0x46 Read Only 4-17
Cache Line Size 0x0C Read/Write 4-8
Capability ID 0x40 Read Only 4-14
Capability Pointer 0x34 Read Only 4-12
Class Code 0x09 Read Only 4-7
Command 0x04 Read/Write 4-3
Data 0x47 Read Only 4-17
Device ID 0x02 Read Only 4-3
Expansion ROM Base Address 0x30 Read/Write 4-11
Header Type 0x0E Read Only 4-9
Interrupt Line 0x3C Read/Write 4-13
Interrupt Pin 0x3D Read Only 4-13
Latency Timer 0x0D Read/Write 4-8
Max_Lat 0x3F Read Only 4-14
Min_Gnt 0x3E Read Only 4-13
Next Item Pointer 0x41 Read Only 4-15