Electro Cam PL-1746 Series - Manual (Page 31)

3-1 How to Program the PLS
Backplane Programming
The PL-1746 Programmable Limit Switch Module was designed to work in a SLC-500 series chassis. All of the module's
channels, enable inputs, configuration data, and pulse information is available to the SLC-500 processor through the
backplane of the chassis. All of the data in the PLS module accessible by the SLC-500 processor is contained in one of
four data files. These are the Input file, Output file, M0 file, and M1 file. Each data element in these files is referred to in
the ladder program by a specific address. Addresses are constructed as follows:
Addressing
F:S.R/B where:
F is the file specifier. It is I for input files, O for output files, M0 for the M0 files and M1 for the M1 files.
S is the number of the slot in which the PLS module is installed.
R is the desired register number.
B is the number of the desired bit in the specified register.
If you are accessing an entire register, the /B parameter is not needed. It is only used to access specific bits of a register.
For instance, if the ladder program needs the resolver speed, and the PLS module is installed in slot three of the SLC-
500 chassis, the ladder program would reference address M0:3.22. When the ladder program checks the status of the
Any Error bit in the Programming Error Register, it would reference address I:3.7/15. Because this flag is a single bit, the
/B parameter is required.
Input File
The input file in the PL-1746 module contains ten data words. The first two words (I:S.0-I:S.1) contain the status of all 32
of the PLS outputs. The next three words (I:S.2-I:S.4) in the input file are not pre-defined by the PLS. The Error Number
Register is in I:S.6, and the Programming Error Register is in I:S.7. Raw Resolver Position, updated every scan cycle, is
in I:S.8.
Output File
The output file also contains ten data words but only the first two words are pre-defined by the PLS. The first contains the
Input Status Register. The PL-1746’s six Group Inputs, the First Cycle Enable Input, and the Output Enable Input can be
set or cleared by writing to O:S.0. The second word in the output file is the Active Program Register, O:S.1. This register
controls which program in the PL-1746 is controlling the PLS outputs; if it contains zero, the program number in the
Default Program register is used. Although data may be written to the eight other output file registers, it will be ignored by
the PL-1746.
M0 & M1 Files
All PLS configuration data is accessed through the module's M0 file and all pulse data is accessed through the M1 file.
Some registers in the M0 file are unused and are reserved for future expansion. All of the data in the M1 file, and most
of the data in the M0 file, is stored in non-volatile memory and is retained during power down.
The M0 and M1 files are usually accessed through the use of a block transfer command such a MOV. In the PL-1746,
the M1 file is read only. You can move a maximum of 1000 words with one block transfer. An error will be generated if
a larger block size is attempted. The number of the last accepted register is placed in the error location register.
When the ladder program changes data in the M0 file, the change is checked for validity, and if valid, is stored in the non-
volatile memory. After storing, the change takes effect. If the change is found to be invalid, the change is rejected, the
Programming Error Register (I:S.7) is set to indicate the nature of the error, and the number of the register that generated
the error is loaded into the Error Number Register (I:S.6). After making a change to the M0 file, the ladder program
should test the status of the Programming Error Register. If an error was generated, the ladder program should correct
the cause, and then clear the error by toggling the Clear Error bit (O:S.0/8) in the Input Status Register from 0 to 1.
Backplane Interlock
The PLS configuration data is stored in EE-PROM in the PL-1746. This type of non-volatile memory has very slow write
cycles. Since the PL-1746 runs slower while storing configuration data than the SLC-500 ladder program, the possibility
of backplane overflow exists. Also, in the C02/C03, copy commands should be limited to a maximum of 12 words, or the
C02/C03 may cause a “specialty I/O module in slot 1 has not responded to a lock shared memory command within the
required time limit” fault in the SLC program. To avoid these conditions, a register is available at M0:S.866 called Backplane
Interlock. The ladder program writes a command or a series of commands to the PL-1746. It then writes a one to the
backplane and tests that location to see when it changes back to zero. Whenever the PL-1746 detects a write to the
Interlock, it will respond by writing zero back to that location. This allows the ladder program to know when the previous
command has been executed. Then another command or series of commands can be delivered.