Running the clock uncertainty calculator flow, Pll settings summary extraction, Syntax – Altera HardCopy II Clock Uncertainty Calculator User Manual

Page 17: Running the clock uncertainty calculator flow –3

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Altera Corporation

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HardCopy II Clock Uncertainty Calculator User Guide

Launching the HardCopy II Clock Uncertainty Calculator

Download and Install the HardCopy II Clock Uncertainty
Calculator

The HardCopy II Clock Uncertainty Calculator includes a Tcl script for
PLL extraction and a clock uncertainty calculator spreadsheet, and is
available from the Altera web site (www.altera.com). After reading the
terms and conditions, and clicking I Agree, you can download the
package in .zip format to your hard drive.

Installation of HardCopy II Clock Uncertainty Calculator

After you download the .zip file of the HardCopy II Clock Uncertainty
Calculator package, unzip the file to extract the following files:

get_pll.tcl

HCII_CU_Calculator.Rev<version number>.xls

Copy or move these two files into the design’s Quartus II working
directory.

Running the
Clock
Uncertainty
Calculator Flow

This section provides detailed procedures for the HardCopy II Clock
Uncertainty Calculator flow. It includes PLL extraction, clock transfer
report, and instructions for running the HardCopy II Clock Uncertainty
Calculator spreadsheet.

PLL Settings Summary Extraction

Before starting the PLL settings summary extraction, you should have the
generated FPGA design database ready in the Quartus II software. Even
if your design does not contain any PLLs, you must still run the design
through the Quartus II software. PLL settings summary extraction
requires the Tcl script, get_pll.tcl, within the working directory.

Syntax

Use the following syntax for the PLL settings summary extraction:

$QUARTUS_HOME/bin/quartus_sh –t get_pll.tcl
<project_name>

where

$QUARTUS_HOME is the installation directory of the Quartus II

software.

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